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The following are some common countries' logistic time.
| Parameters | |
|---|---|
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn85Pb15) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | YES |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 225 |
| Supply Voltage | 2.5V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 44 |
| Operating Supply Voltage | 2.5V |
| Temperature Grade | INDUSTRIAL |
| Number of I/O | 34 |
| Memory Type | FLASH |
| Propagation Delay | 7.5 ns |
| Turn On Delay Time | 7.5 ns |
| Frequency (Max) | 125MHz |
| Organization | 0 DEDICATED INPUTS, 34 I/O |
| Number of Logic Blocks (LABs) | 2 |
| Speed Grade | 7 |
| Output Function | MACROCELL |
| Number of Macro Cells | 36 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Package / Case | PLCC |
| Surface Mount | YES |
| Number of Pins | 44 |
| JESD-609 Code | e0 |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 44 |
XC9536XV7PC44I Overview
Currently, there are 36 macro cells, which are low-power cell sites (towers, antennas, masts) that serve as radio coverage.The product is contained in a PLCC package.In this case, there are 34 I/Os programmed.The device is programmed with 44 terminations.The terminal position of this electrical component is QUAD.An electrical supply voltage of 2.5V is used to power it.The part is included in Programmable Logic Devices.Chips are programmed with 44 pins.This device also displays [0].For high efficiency, the supply voltage should be maintained at [0].In this case, FLASHwill be used to store the data.The device is designed with pins [0].It is recommended that the operating temperature exceed -40°C.It is recommended that the operating temperature be below 85°C.Its basic building block is composed of 2 logic blocks (LABs).There should be a lower maximum frequency than 125MHz.
XC9536XV7PC44I Features
PLCC package
34 I/Os
44 pin count
44 pins
2 logic blocks (LABs)
XC9536XV7PC44I Applications
There are a lot of Xilinx XC9536XV7PC44I CPLDs applications.
- Address decoders
- ROM patching
- ToR/Aggregation/Core Switch and Router
- DDC INTERFACE
- Auxiliary Power Supply Isolated and Non-isolated
- Power Meter SMPS
- Timing control
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- Pattern recognition
- I/O expansion
