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ContactSTL20DN10F7
STL20DN10F7 datasheet pdf and Transistors - FETs, MOSFETs - Arrays product details from STMicroelectronics stock available at Feilidi
- Manufacturer: STMicroelectronics
- NO: 761-STL20DN10F7
- Package: 8-PowerVDFN
- Datasheet:
- Stock: 4411
- Description: STL20DN10F7 datasheet pdf and Transistors - FETs, MOSFETs - Arrays product details from STMicroelectronics stock available at Feilidi(Kg)
- Delivery:
- Payment:
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| Parameters | |
|---|---|
| ECCN Code | EAR99 |
| Resistance | 65mOhm |
| Subcategory | FET General Purpose Powers |
| Max Power Dissipation | 62.5W |
| Terminal Form | FLAT |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | STL20 |
| JESD-30 Code | R-PDSO-F6 |
| Number of Elements | 2 |
| Number of Channels | 2 |
| Element Configuration | Dual |
| Operating Mode | ENHANCEMENT MODE |
| Case Connection | DRAIN |
| Turn On Delay Time | 6.3 ns |
| FET Type | 2 N-Channel (Dual) |
| Transistor Application | SWITCHING |
| Rds On (Max) @ Id, Vgs | 67m Ω @ 2.5A, 10V |
| Vgs(th) (Max) @ Id | 4.5V @ 250μA |
| Input Capacitance (Ciss) (Max) @ Vds | 408pF @ 50V |
| Gate Charge (Qg) (Max) @ Vgs | 7.8nC @ 10V |
| Rise Time | 3ns |
| Drain to Source Voltage (Vdss) | 100V |
| Fall Time (Typ) | 4 ns |
| Turn-Off Delay Time | 11 ns |
| Continuous Drain Current (ID) | 20A |
| Gate to Source Voltage (Vgs) | 20V |
| Drain to Source Breakdown Voltage | 100V |
| FET Technology | METAL-OXIDE SEMICONDUCTOR |
| FET Feature | Standard |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Lifecycle Status | ACTIVE (Last Updated: 8 months ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 8-PowerVDFN |
| Number of Pins | 8 |
| Transistor Element Material | SILICON |
| Operating Temperature | -55°C~150°C TJ |
| Packaging | Cut Tape (CT) |
| Series | DeepGATE™, STripFET™ VII |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
STL20DN10F7 Description
The device adopts the seventh generation design rules of ST's proprietary STripFET fabrication technology and adopts a new gate structure. The resulting power MOSFET shows the lowest RDS (on) of all packages.
STL20DN10F7 Features
? N-channel enhancement mode
? Lower RDS(on) x area vs previous generation
? 100% avalanche rated
STL20DN10F7 Applications
? Switching applications
