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ContactSPEAR300-2
0.8mm ARM926EJ-S 1.21.83.3V 32-bit Microprocessor SPEAr? Series SPEAR300 289-Pin 333MHz 1.2V 289-LFBGA
- Manufacturer: STMicroelectronics
- NO: 761-SPEAR300-2
- Package: 289-LFBGA
- Datasheet:
- Stock: 6574
- Description: 0.8mm ARM926EJ-S 1.21.83.3V 32-bit Microprocessor SPEAr? Series SPEAR300 289-Pin 333MHz 1.2V 289-LFBGA (Kg)
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| Parameters | |
|---|---|
| Contact Plating | Copper, Silver, Tin |
| Mount | Surface Mount |
| Package / Case | 289-LFBGA |
| Number of Pins | 289 |
| Operating Temperature | -40°C~85°C TC |
| Packaging | Tray |
| Series | SPEAr® |
| JESD-609 Code | e1 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 289 |
| ECCN Code | 5A002.A.4 |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| HTS Code | 8542.31.00.01 |
| Subcategory | Microprocessors |
| Technology | CMOS |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 1.2V |
| Terminal Pitch | 0.8mm |
| Frequency | 333MHz |
| Base Part Number | SPEAR300 |
| Pin Count | 289 |
| Operating Supply Voltage | 1.2V |
| Power Supplies | 1.21.83.3V |
| Voltage | 3.6V |
| Interface | I2C, Serial, UART, USB |
| Max Supply Voltage | 2.5V |
| Min Supply Voltage | 1.14V |
| Memory Size | 32kB |
| Number of I/O | 62 |
| RAM Size | 56kB |
| uPs/uCs/Peripheral ICs Type | MICROCONTROLLER, RISC |
| Core Processor | ARM926EJ-S |
| Bit Size | 32 |
| Has ADC | YES |
| DMA Channels | YES |
| Data Bus Width | 16b |
| PWM Channels | NO |
| DAC Channels | YES |
| Number of Timers/Counters | 6 |
| Core Architecture | ARM |
| Voltage - I/O | 3.3V |
| Ethernet | 10/100Mbps (1) |
| Number of Cores/Bus Width | 1 Core 32-Bit |
| Graphics Acceleration | No |
| RAM Controllers | LPDDR, DDR2 |
| USB | USB 2.0 + PHY (3) |
| Additional Interfaces | I2C, I2S, IrDA, Microwire, MMC/SDIO, SPI, UART |
| Co-Processors/DSP | Security; C3 |
| ROM Programmability | FLASH |
| Security Features | Cryptography |
| Display & Interface Controllers | Keyboard, LCD, Touchscreen |
| Height Seated (Max) | 1.7mm |
| Length | 15mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
SPEAR300-2 Description
The SPEAR300-2 internal architecture is based on several shared subsystem logic blocks interconnected through a multilayer interconnection matrix. The switch matrix structure allows different subsystem dataflow to be executed in parallel improving the core platform efficiency. High-performance master agents are directly interconnected with the memory controller reducing the memory access latency. The overall memory bandwidth assigned to each master port can be programmed and optimized through an internally efficient weighted round-robin arbitration mechanism.
SPEAR300-2 Features
ARM926EJ-S core up to 333 MHz
High-performance 8-channel DMA
Dynamic power-saving features
Configurable peripheral functions on 102 shared I/Os
32 KB ROM and 56 KB internal SRAM
Integrated real-time clock, watchdog, and system controller
SPEAR300-2 Applications
General purpose NAND Flash or NOR Flash-based devices
Digital photo frames
WiFi or IP phones (low-end or high-end)
ATA PABX systems (with or without I2S)
8-bit or 14-bit camera (with or without LCD)
