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ContactSI5330H-A00220-GM
1 Circuit 350MHz 3.3V 1:8 Clock Buffer QUAD SI5330 24 Pins 24-VFQFN Exposed Pad
- Manufacturer: Silicon Labs
- NO: 715-SI5330H-A00220-GM
- Package: 24-VFQFN Exposed Pad
- Datasheet:
- Stock: 2365
- Description: 1 Circuit 350MHz 3.3V 1:8 Clock Buffer QUAD SI5330 24 Pins 24-VFQFN Exposed Pad(Kg)
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| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 24-VFQFN Exposed Pad |
| Number of Pins | 24 |
| Weight | 41.191857mg |
| Operating Temperature | -40°C~85°C |
| Packaging | Tray |
| Published | 1997 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 2 (1 Year) |
| Number of Terminations | 24 |
| Type | Fanout Buffer (Distribution), Translator |
| Subcategory | Clock Drivers |
| Voltage - Supply | 1.71V~3.63V |
| Terminal Position | QUAD |
| Number of Functions | 1 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.5mm |
| Base Part Number | SI5330 |
| Output | SSTL |
| Pin Count | 24 |
| Number of Outputs | 8 |
| Supply Voltage-Max (Vsup) | 3.63V |
| Supply Voltage-Min (Vsup) | 2.97V |
| Number of Circuits | 1 |
| Frequency (Max) | 350MHz |
| Input | CML, HCSL, LVDS, LVPECL |
| Ratio - Input:Output | 1:8 |
| Max I(ol) | 0.004 A |
| Differential - Input:Output | Yes/No |
| Max Duty Cycle | 60 % |
| fmax-Min | 350 MHz |
| Height Seated (Max) | 0.9mm |
| Length | 4mm |
| Width | 4mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
SI5330H-A00220-GM Overview
The clock divider is available in 24-VFQFN Exposed Pad case. There is a Tray package attached to it. Normal operation has a maximum value of 350MHz. There are 24 terminations in it. Supply voltages of 3.3V allow for high efficiency. It's?set?up?in?the?way?of?Surface Mount. Electronic parts classified as Fanout Buffer (Distribution), Translator are considered to be safety components. To ensure reliable performance, the temperature should be set to -40°C~85°C. The clock switch should operate with a voltage of 1.71V~3.63VV. In the direction of Surface Mount, it is placed. 24 pins are present on timeing clock. There is a value of SSTL as the output. For operation, 24 pins are used. This is a member of the SI5330 family. The clock divider is located in Clock Drivers. In this case, Vsup will be set to 3.63V (decimal). As a general rule, the supply voltage (Vsup) should be maintained above 2.97V. By default, the output is set to 8.
SI5330H-A00220-GM Features
24 terminations
The operating temperature of -40°C~85°C degrees
Clock Drivers subcategory
SI5330H-A00220-GM Applications
There are a lot of Silicon Labs SI5330H-A00220-GM Clock Buffers & Drivers applications.
- Defense and aerospace equipment
- Mobile Internet Device (MID)
- Tlecom applications
- Oscilloscope and logic analyzer front ends
- DDR4 JEDEC standard RDIMM design
- Edge computing
- High-end consumer electronics
- Line receiver and signal recovery
- Medical instruments
- Radar
