KSZ8895MQXC

1.8V 2.5V 3.3V 10/100 Base-T/TX PHY I2C, SPI Controllers Interface ICs QUAD KSZ8895 Switch 0.5mm 128-BFQFP

Manufacturer: Microchip Technology
NO: 536-KSZ8895MQXC
Package: 128-BFQFP
Datasheet:
Stock: 3745
Description: 1.8V 2.5V 3.3V 10/100 Base-T/TX PHY I2C, SPI Controllers Interface ICs QUAD KSZ8895 Switch 0.5mm 128-BFQFP(Kg)

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Shipping Cost

Shipping starts at $40, but some countries will exceed $40. For example (South Africa, Brazil, India, Pakistan, Israel, etc.)
The basic freight (for package ≤0.5kg or corresponding volume) depends on the time zone and country.

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Currently, our products are shipped through DHL, FedEx, SF, and UPS.

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FedEx International, 5-7 business days.

The following are some common countries' logistic time. transport

SPECIFICATIONS

Parameters
Factory Lead Time	8 Weeks
Package / Case	128-BFQFP
Surface Mount	YES
Operating Temperature	0°C~70°C
Packaging	Tray
Published	2004
Part Status	Active
Moisture Sensitivity Level (MSL)	3 (168 Hours)
Number of Terminations	128
HTS Code	8542.39.00.01
Voltage - Supply	1.8V 2.5V 3.3V
Terminal Position	QUAD
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	NOT SPECIFIED
Supply Voltage	1.2V
Terminal Pitch	0.5mm
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Base Part Number	KSZ8895
JESD-30 Code	R-PQFP-G128
Function	Switch
Interface	I2C, SPI
Current - Supply	129mA
Data Rate	100 Mbps
Protocol	Ethernet
Screening Level	TS 16949
Standards	10/100 Base-T/TX PHY
Height Seated (Max)	3.4mm
Length	20mm
Width	14mm
RoHS Status	ROHS3 Compliant

KSZ8895MQXC Description

The KSZ8895MQXC is an Integrated 5-Port 10/100 Managed Ethernet Switch with MII/RMII Interface.

KSZ8895MQXC Features

IEEE 802.1q VLAN Support for up to 128 Active VLAN Groups (Full-Range 4096 of VLAN IDs)
Static MAC Table Supports up to 32 Entries
VLAN ID Tag/Untagged Options, Per Port Basis
IEEE 802.1p/q Tag Insertion or Removal on a Per Port Basis Based on Ingress Port (Egress)
Programmable Rate Limiting at the Ingress and Egress on a Per Port Basis
Jitter-Free Per Packet Based Rate Limiting Support
Broadcast Storm Protection with Percentage Control (Global and Per Port Basis)
IEEE 802.1d Rapid Spanning Tree Protocol RSTP Support
Tail Tag Mode (1 Byte Added Before FCS) Support at Port 5 to Inform the Processor Which Ingress Port Receives the Packet
1.4 Gbps High-Performance Memory Bandwidth and Shared Memory Based Switch Fabric with Fully Non-Blocking Configuration
Dual MII with MAC 5 and PHY 5 on Port 5, SW5- MII/RMII for MAC 5 and P5-MII/RMII for PHY 5
Enable/Disable Option for Huge Frame Size up to 2000 Bytes Per Frame
IGMP v1/v2 Snooping (IPv4) Support for Multicast Packet Filtering
IPv4/IPv6 QoS Support
Support Unknown Unicast/Multicast Address and Unknown VID Packet Filtering
Self-Address Filtering