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The following are some common countries' logistic time.
| Parameters | |
|---|---|
| Factory Lead Time | 10 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 2 days ago) |
| Contact Plating | Tin |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 6-TSSOP, SC-88, SOT-363 |
| Number of Pins | 6 |
| Weight | 28mg |
| Transistor Element Material | SILICON |
| Operating Temperature | -55°C~150°C TJ |
| Packaging | Tape & Reel (TR) |
| Published | 1999 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
| Termination | SMD/SMT |
| ECCN Code | EAR99 |
| Resistance | 4Ohm |
| Additional Feature | LOGIC LEVEL COMPATIBLE |
| Subcategory | FET General Purpose Power |
| Voltage - Rated DC | 25V |
| Max Power Dissipation | 300mW |
| Terminal Form | GULL WING |
| Current Rating | 220mA |
| Number of Elements | 2 |
| Element Configuration | Dual |
| Operating Mode | ENHANCEMENT MODE |
| Power Dissipation | 300mW |
| Turn On Delay Time | 5 ns |
| FET Type | 2 N-Channel (Dual) |
| Transistor Application | SWITCHING |
| Rds On (Max) @ Id, Vgs | 4 Ω @ 220mA, 4.5V |
| Vgs(th) (Max) @ Id | 1.5V @ 250μA |
| Input Capacitance (Ciss) (Max) @ Vds | 9.5pF @ 10V |
| Gate Charge (Qg) (Max) @ Vgs | 0.4nC @ 4.5V |
| Rise Time | 4.5ns |
| Fall Time (Typ) | 4.5 ns |
| Turn-Off Delay Time | 4 ns |
| Continuous Drain Current (ID) | 220mA |
| Threshold Voltage | 850mV |
| Gate to Source Voltage (Vgs) | 8V |
| Drain to Source Breakdown Voltage | 25V |
| Dual Supply Voltage | 25V |
| FET Technology | METAL-OXIDE SEMICONDUCTOR |
| Max Junction Temperature (Tj) | 150°C |
| FET Feature | Logic Level Gate |
| Height | 1.1mm |
| Length | 2mm |
| Width | 1.25mm |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
Onsemi's patented, high cell density, DMOS technology is used to manufacture the FDG6301N dual N-Channel logic level enhancement MOSFET. This ultra-high-density technique is specifically designed to reduce on-state resistance. This device was created to replace bipolar digital transistors and tiny signal MOSFETs in low voltage applications. The FDG6301N MOSFET is widely renowned for its low drain-on-resistance and durable ESD architecture.
25 V, 0.22 A continuous, 0.65 A peak
Low RDS(ON) = 4 Ω @ VGS= 4.5 V
Very low-level gate drive requirements allow direct operation in 3 V circuits (VGS(th) < 1.5 V).
Gate-Source Zener for ESD ruggedness
Compact industry standard SC70-6 surface mount package
High Current, High-Speed Switching
Up to 12s Battery Power Tools
Buck Converters
Power Converters with Multi-Megahertz Operation
Three-Phase Bridge for Brushless DC Motor Control
Lighting Applications
Other Half and Full-Bridge Topologies
Off-Line Power Supplies
PFC Controllers
Adapters
Battery Management
Please send RFQ , we will respond immediately.