FDC6322C

FDC6322C datasheet pdf and Transistors - FETs, MOSFETs - Arrays product details from ON Semiconductor stock available at Feilidi

Manufacturer: ON Semiconductor
NO: 598-FDC6322C
Package: SOT-23-6 Thin, TSOT-23-6
Datasheet:
Stock: 4037
Description: FDC6322C datasheet pdf and Transistors - FETs, MOSFETs - Arrays product details from ON Semiconductor stock available at Feilidi(Kg)

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SPECIFICATIONS

Parameters
Mounting Type	Surface Mount
Package / Case	SOT-23-6 Thin, TSOT-23-6
Supplier Device Package	SuperSOT™-6
Operating Temperature	-55°C~150°C TJ
Packaging	Tape & Reel (TR)
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	1 (Unlimited)
Power - Max	700mW
FET Type	N and P-Channel
Rds On (Max) @ Id, Vgs	4Ohm @ 400mA, 4.5V
Vgs(th) (Max) @ Id	1.5V @ 250μA
Input Capacitance (Ciss) (Max) @ Vds	9.5pF @ 10V
Current - Continuous Drain (Id) @ 25°C	220mA 460mA
Gate Charge (Qg) (Max) @ Vgs	0.7nC @ 4.5V
Drain to Source Voltage (Vdss)	25V
FET Feature	Logic Level Gate

FDC6322C Description

These dual N & P Channel logic level enhancement mode field effective transistors are made utilizing a high cell density DMOS process that is exclusive to Fairchild. This extremely dense method has been specifically designed to reduce on-state resistance. In order to replace bipolar digital transistors in load switching applications, the device has an optimized design specifically for low voltage applications. This dual digital FET can replace many digital transistors with different bias resistors because bias resistors are not necessary.

FDC6322C Features

N-Ch 25 V, 0.22 A, 5 W at 2.7 V VGS(ON)
P-Ch 25 V, -0.46 A, 1.5 W @ -2.7 V, RDS(ON).
Direct operation in 3 V circuits is made possible by the extremely low level gate drive requirements. 1.5 V for VGS(th).
For ESD toughness, use a Gate-Source Zener. >6kV Human Body Model
Replace the digital transistors PNP and NPN.