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ContactFDC6320C
FDC6320C datasheet pdf and Transistors - FETs, MOSFETs - Arrays product details from ON Semiconductor stock available at Feilidi
- Manufacturer: ON Semiconductor
- NO: 598-FDC6320C
- Package: SOT-23-6 Thin, TSOT-23-6
- Datasheet:
- Stock: 4966
- Description: FDC6320C datasheet pdf and Transistors - FETs, MOSFETs - Arrays product details from ON Semiconductor stock available at Feilidi(Kg)
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| Parameters | |
|---|---|
| Subcategory | Other Transistors |
| Max Power Dissipation | 700mW |
| Terminal Form | GULL WING |
| Current Rating | 220mA |
| Number of Elements | 2 |
| Element Configuration | Dual |
| Operating Mode | ENHANCEMENT MODE |
| Power Dissipation | 900mW |
| FET Type | N and P-Channel |
| Transistor Application | SWITCHING |
| Rds On (Max) @ Id, Vgs | 4 Ω @ 400mA, 4.5V |
| Vgs(th) (Max) @ Id | 1.5V @ 250μA |
| Input Capacitance (Ciss) (Max) @ Vds | 9.5pF @ 10V |
| Current - Continuous Drain (Id) @ 25°C | 220mA 120mA |
| Gate Charge (Qg) (Max) @ Vgs | 0.4nC @ 4.5V |
| Rise Time | 6ns |
| Polarity/Channel Type | N-CHANNEL AND P-CHANNEL |
| Fall Time (Typ) | 6 ns |
| Turn-Off Delay Time | 7.4 ns |
| Continuous Drain Current (ID) | 220mA |
| Threshold Voltage | 850mV |
| Gate to Source Voltage (Vgs) | 8V |
| Drain to Source Breakdown Voltage | 25V |
| Dual Supply Voltage | 25V |
| FET Technology | METAL-OXIDE SEMICONDUCTOR |
| FET Feature | Logic Level Gate |
| Nominal Vgs | 850 mV |
| Radiation Hardening | No |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
| Factory Lead Time | 10 Weeks |
| Lifecycle Status | ACTIVE (Last Updated: 2 days ago) |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | SOT-23-6 Thin, TSOT-23-6 |
| Number of Pins | 6 |
| Weight | 36mg |
| Transistor Element Material | SILICON |
| Operating Temperature | -55°C~150°C TJ |
| Packaging | Tape & Reel (TR) |
| Published | 1997 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 6 |
| Termination | SMD/SMT |
| ECCN Code | EAR99 |
| Resistance | 4Ohm |
| Terminal Finish | Tin (Sn) |
| Additional Feature | LOGIC LEVEL COMPATIBLE |
FDC6320C Description
These dual Numbp channel logic level enhanced mode field effect transistors are produced using proprietary high cell density DMOS technology. This very high-density process is specially tailored to minimize on-resistance. The device is an improved design, which is especially suitable for low voltage applications as an alternative to bipolar digital transistors in load switching applications. Because there is no need for bias resistors, this dual digital FET can replace multiple digital transistors with different bias resistors.
FDC6320C Features
N-Ch 25 V, 0.22 A, RDS(ON) = 5 |? @ VGS= 2.7 V.
P-Ch 25 V, -0.12 A, RDS(ON) = 13 |? @ VGS= -2.7 V.
Very low level gate drive requirements allowing direct operation in 3 V circuits. VGS(th) < 1.5 V.
Gate-Source Zener for ESD ruggedness. >6kV Human Body Model.
Replace NPN & PNP digital transistors.
FDC6320C Applications
This product is general usage and suitable for many different applications.
