F280049PZQR

The Piccolo™ TMS320F28004x (F28004x) is a powerful 32-bit floating-point microcontroller unit (MCU) that lets designers incorporate crucial control peripherals, differentiated analog, and nonvolatile memory on a single device. The real-time control subsystem is based on TI’s 32-bit C28x CPU, which provides 100 MHz of signal processing performance. The C28x CPU is further boosted by the new TMU extended instruction set, which enables fast execution of algorithms with trigonometric operations commonly found in transforms and torque loop calculations; and the VCU-I extended instruction set, which reduces the latency for complex math operations commonly found in encoded applications. The CLA allows significant offloading of common tasks from the main C28x CPU. The CLA is an independent 32-bit floating-point math accelerator that executes in parallel with the CPU. Additionally, the CLA has its own dedicated memory resources and it can directly access the key peripherals that are required in a typical control system. Support of a subset of ANSI C is standard, as are key features like hardware breakpoints and hardware task-switching. The F28004x supports up to 256KB (128KW) of flash memory divided into two 128KB (64KW) banks, which enables programming and execution in parallel. Up to 100KB (50KW) of on-chip SRAM is also available in blocks of 4KB (2KW) and 16KB (8KW) for efficient system partitioning. Flash ECC, SRAM ECC/parity, and dual-zone security are also supported. High-performance analog blocks are integrated on the F28004x MCU to further enable system consolidation. Three separate 12-bit ADCs provide precise and efficient management of multiple analog signals, which ultimately boosts system throughput. Seven PGAs on the analog front end enable on-chip voltage scaling before conversion. Seven analog comparator modules provide continuous monitoring of input voltage levels for trip conditions. The TMS320C2000™ devices contain industry-leading control peripherals with frequency-independent ePWM/HRPWM and eCAP allow for a best-in-class level of control to the system. The built-in 4-channel SDFM allows for seamless integration of an oversampling sigma-delta modulator across an isolation barrier. Connectivity is supported through various industry-standard communication ports (such as SPI, SCI, I2C, LIN, and CAN) and offers multiple muxing options for optimal signal placement in a variety of applications. New to the C2000™ platform is the fully compliant PMBus. Additionally, in an industry first, the FSI enables high-speed, robust communication to complement the rich set of peripherals that are embedded in the device. A specially enabled device variant, TMS320F28004xC, allows access to the Configurable Logic Block (CLB) for additional interfacing features and allows access to the secure ROM, which includes a library to enable InstaSPIN-FOC™. See Device Comparison for more information

Features • TMS320C28x 32-bit CPU – 100 MHz – IEEE 754 single-precision Floating-Point Unit (FPU) – Trigonometric Math Unit (TMU) • 3×-cycle to 4×-cycle improvement for common trigonometric functions versus software libraries • 13-cycle Park transform – Viterbi/Complex Math Unit (VCU-I) – Ten hardware breakpoints (with ERAD) • Programmable Control Law Accelerator (CLA) – 100 MHz – IEEE 754 single-precision floating-point instructions – Executes code independently of main CPU • On-chip memory – 256KB (128KW) of flash (ECC-protected) across two independent banks – 100KB (50KW) of RAM (ECC-protected or parity-protected) – Dual-zone security supporting third-party development – Unique Identification (UID) number • Clock and system control – Two internal zero-pin 10-MHz oscillators – On-chip crystal oscillator and external clock input – Windowed watchdog timer module – Missing clock detection circuitry • 1.2-V core, 3.3-V I/O design – Internal VREG or DC-DC for 1.2-V generation allows for single-supply designs – Brownout reset (BOR) circuit • System peripherals – 6-channel Direct Memory Access (DMA) controller – 40 individually programmable multiplexed General-Purpose Input/Output (GPIO) pins – 21 digital inputs on analog pins – Enhanced Peripheral Interrupt Expansion (ePIE) module – Multiple low-power mode (LPM) support with external wakeup – Embedded Real-time Analysis and Diagnostic (ERAD) • Communications peripherals – One Power-Management Bus (PMBus) interface – One Inter-integrated Circuit (I2C) interface (pin-bootable) – Two Controller Area Network (CAN) bus ports (pin-bootable) – Two Serial Peripheral Interface (SPI) ports (pin-bootable) – Two UART-Compatible Serial Communication Interfaces (SCIs) (pin-bootable) – One UART-Compatible Local Interconnect Network (LIN) – One Fast Serial Interface (FSI) with a transmitter and receiver • Analog system – Three 3.45-MSPS, 12-bit Analog-to-Digital Converters (ADCs) • Up to 21 external channels • Four integrated post-processing blocks (PPBs) per ADC – Seven windowed comparators (CMPSS) with 12-bit reference Digital-to-Analog Converters (DACs) • Digital glitch filters – Two 12-bit buffered DAC outputs – Seven Programmable Gain Amplifiers (PGAs) • Programmable gain settings: 3, 6, 12, 24 • Programmable output filtering • Enhanced control peripherals – 16 ePWM channels with high-resolution capability (150-ps resolution) • Integrated dead-band support with high resolution • Integrated hardware trip zones (TZs) – Seven Enhanced Capture (eCAP) modules • High-resolution Capture (HRCAP) available on two modules – Two Enhanced Quadrature Encoder Pulse (eQEP) modules with support for CW/CCW operation modes – Four Sigma-Delta Filter Module (SDFM) input channels (two parallel filters per channel) • Standard SDFM data filtering • Comparator filter for fast action for overvalue or undervalue condition • Configurable Logic Block (CLB) – Augments existing peripheral capability – Supports position manager solutions