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ContactEPM7128SQI100-10
0.65mm PMIC 100 Pin 125MHz 5V PQFP
- Manufacturer: Altera
- NO: 2936-EPM7128SQI100-10
- Package: PQFP
- Datasheet:
- Stock: 7998
- Description: 0.65mm PMIC 100 Pin 125MHz 5V PQFP (Kg)
- Delivery:
- Payment:
In Stock
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| Parameters | |
|---|---|
| Factory Lead Time | 37 Weeks |
| Mount | Surface Mount |
| Package / Case | PQFP |
| Number of Pins | 100 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 100 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 20 |
| Pin Count | 100 |
| Operating Supply Voltage | 5V |
| Temperature Grade | INDUSTRIAL |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Number of I/O | 84 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 147.1MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 2500 |
| Number of Programmable I/O | 84 |
| Number of Logic Blocks (LABs) | 8 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 3.65mm |
| Length | 20mm |
| Width | 14mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Contains Lead |
EPM7128SQI100-10 Overview
This network has 128macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).There is a PQFP package containing it.It is programmed with 84 I/Os.The termination of a device is set to [0].There is a QUADterminal position on the electrical part in question.An electrical supply voltage of 5V is used to power it.This part is in the family [0].Chips are programmed with 100 pins.The device can also be used to find [0].The 2500gates serve as building blocks for digital circuits.Optimal efficiency requires a supply voltage of [0].It is recommended that data be stored in [0].It is mounted by Surface Mount.There are 100pins on it.There is a maximum supply voltage of 5.5V.With a minimal supply voltage of [0], it operates.A total of 84 Programmable I/Os are available.There is 125MHz frequency that can be achieved.Ideally, the operating temperature should be greater than -40°C.The operating temperature should be lower than 85°C.Its basic building block is composed of 8 logic blocks (LABs).It is recommended that the maximum frequency be less than 147.1MHz.This kind of FPGA is composed of EE PLD.
EPM7128SQI100-10 Features
PQFP package
84 I/Os
100 pin count
100 pins
8 logic blocks (LABs)
EPM7128SQI100-10 Applications
There are a lot of Altera EPM7128SQI100-10 CPLDs applications.
- Software-driven hardware configuration
- Pattern recognition
- I2C BUS INTERFACE
- Multiple Clock Source Selection
- Digital designs
- Power Meter SMPS
- Protection relays
- Digital systems
- Timing control
- Digital multiplexers
