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ContactEPM7064STC100-7
0.5mm PMIC 100 Pin 166.7MHz 5V TQFP
- Manufacturer: Altera
- NO: 2936-EPM7064STC100-7
- Package: TQFP
- Datasheet:
- Stock: 2364
- Description: 0.5mm PMIC 100 Pin 166.7MHz 5V TQFP (Kg)
- Delivery:
- Payment:
In Stock
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| Parameters | |
|---|---|
| Factory Lead Time | 12 Weeks |
| Mount | Surface Mount |
| Package / Case | TQFP |
| Number of Pins | 100 |
| Published | 1998 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 100 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 235 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.5mm |
| Frequency | 166.7MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 100 |
| Operating Supply Voltage | 5V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Number of I/O | 68 |
| Memory Type | EEPROM |
| Propagation Delay | 7.5 ns |
| Turn On Delay Time | 7.5 ns |
| Frequency (Max) | 175.4MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 1250 |
| Number of Programmable I/O | 68 |
| Number of Logic Blocks (LABs) | 4 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height Seated (Max) | 1.27mm |
| Radiation Hardening | No |
| RoHS Status | Non-RoHS Compliant |
| Lead Free | Contains Lead |
EPM7064STC100-7 Overview
There are 64 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).The item is enclosed in a TQFP package.There are 68 I/Os programmed in it.Devices are programmed with terminations of [0].This electrical part has a terminal position of QUADand is connected to the ground.It is powered from a supply voltage of 5V.It belongs to the family [0].100pins are programmed on the chip.A digital circuit can be constructed using 1250gates.In order to achieve high efficiency, the supply voltage should be maintained at [0].EEPROM is adopted for storing data.Surface Mountis the mounting point of this electronic part.The device is designed with pins [0].A maximum supply voltage of 5.25Vis used in its operation.It is powered by 4.75Vas its minimum supply voltage.A total of 68 Programmable I/Os are available.The frequency that can be achieved is 166.7MHz.Operating temperatures should be higher than 0°C.A temperature less than 70°Cshould be used for operation.It is composed of 4 logic blocks (LABs).It is recommended that the maximum frequency is less than 0.Programmable logic types can be divided into EE PLD.
EPM7064STC100-7 Features
TQFP package
68 I/Os
100 pin count
100 pins
4 logic blocks (LABs)
EPM7064STC100-7 Applications
There are a lot of Altera EPM7064STC100-7 CPLDs applications.
- Protection relays
- Cross-Matrix Switch
- State machine control
- Pattern recognition
- Page register
- Auxiliary Power Supply Isolated and Non-isolated
- Reset swapping
- Multiple DIP Switch Replacement
- Dedicated input registers
- Parity generators
