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1 Circuit 500MHz 3.3V 1:9 Clock Buffer QUAD CDC111 28 Pins 28-LCC (J-Lead)
- Manufacturer: Texas Instruments
- NO: 815-CDC111FNRG4
- Package: 28-LCC (J-Lead)
- Datasheet:
- Stock: 1381
- Description: 1 Circuit 500MHz 3.3V 1:9 Clock Buffer QUAD CDC111 28 Pins 28-LCC (J-Lead)(Kg)
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| Parameters | |
|---|---|
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 28-LCC (J-Lead) |
| Number of Pins | 28 |
| Operating Temperature | 0°C~70°C |
| Packaging | Tape & Reel (TR) |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 28 |
| Type | Fanout Buffer (Distribution) |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Max Power Dissipation | 525mW |
| Voltage - Supply | 3V~3.6V |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 1 |
| Supply Voltage | 3.3V |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Base Part Number | CDC111 |
| Pin Count | 28 |
| Number of Outputs | 9 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 3.6V |
| Supply Voltage-Min (Vsup) | 3V |
| Number of Circuits | 1 |
| Propagation Delay | 600 ps |
| Frequency (Max) | 500MHz |
| Family | 111 |
| Input | LVPECL |
| Ratio - Input:Output | 1:9 |
| Differential - Input:Output | Yes/Yes |
| Same Edge Skew-Max (tskwd) | 0.05 ns |
| Height Seated (Max) | 4.57mm |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Lead Free |
CDC111FNRG4 Overview
There is a case option of 28-LCC (J-Lead) available for this clock divider. It is available in the case Tape & Reel (TR). In normal operation, the maximum value is set to 500MHz. There are 28 terminations in it. It is possible to achieve high efficiency with a 3.3V supply voltage. In this case, it will be mounted by Surface Mount. A classification of Fanout Buffer (Distribution) is assigned to this electronic part. If you wish to ensure reliable performance, you should set the temperature to 0°C~70°C. Any power source will work, as long as it has 3V~3.6VV. In the direction of Surface Mount, it is placed. The clock buffer contains 28 pins. The 28 pins are used for operation. There is a family of objects known as the CDC111. It is part of the 111 family of electronic buffer ICs. A maximum supply voltage (Vsup) is set to 3.6V. The supply voltage (Vsup) should be maintained above 3V in order for the clock divider to operate normally. As a default, it outputs 9.
CDC111FNRG4 Features
28 terminations
The operating temperature of 0°C~70°C degrees
CDC111FNRG4 Applications
There are a lot of Texas Instruments CDC111FNRG4 Clock Buffers & Drivers applications.
- Edge computing
- Storage area network
- Smartphone
- Handheld test instruments
- Peak detection
- DDR4 JEDEC standard RDIMM design
- Line receiver and signal recovery
- Microserver
- High speed line receiver
- High-speed flip-flop
