9DBL411AGLFT

1 Circuit 400MHz 3.3V Clock Buffer DUAL 20 Pins TSSOP


  • Manufacturer: Integrated Device Technology (IDT)
  • NO: 378-9DBL411AGLFT
  • Package: TSSOP
  • Datasheet: pdf
  • Stock: 5935
  • Description: 1 Circuit 400MHz 3.3V Clock Buffer DUAL 20 Pins TSSOP(Kg)

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SPECIFICATIONS

Parameters
Number of True Outputs 4
Length 6.5mm
Width 4.4mm
Thickness 1mm
Radiation Hardening No
RoHS Status RoHS Compliant
Lead Free Lead Free
Factory Lead Time 7 Weeks
Contact Plating Tin
Mount Surface Mount
Package / Case TSSOP
Number of Pins 20
Packaging Tape & Reel
Published 2012
JESD-609 Code e3
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1
Number of Terminations 20
ECCN Code EAR99
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Subcategory Clock Drivers
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 1
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 20
Operating Supply Voltage 3.3V
Temperature Grade COMMERCIAL
Number of Circuits 1
Max Supply Voltage 3.465V
Min Supply Voltage 3.135V
Frequency (Max) 400MHz
Family 9DBL
Input HCSL
Logic IC Type LOW SKEW CLOCK DRIVER
Prop. Delay@Nom-Sup 3.5 ns
Propagation Delay (tpd) 3.5 ns
Same Edge Skew-Max (tskwd) 0.05 ns

9DBL411AGLFT Overview


There is a case of TSSOP in which it is packaged. The package is in the form of a Tape & Reel. As a rule, the maximum value for normal operation is 400MHz. It has 20 terminations. Using a supply voltage of 3.3V allows for high efficiency. There is a place for it in the way of Surface Mount. A pin count of 20 can be found on it. Operation is performed with 20 pins. The circuit clock is contained in Clock Drivers. A minimum working temperature of 0°C is required to maintain its reliability. 70°C is the maximum operating temperature that ensures stable operation. The buffer IC belongs to the 9DBL family. With a LOW SKEW CLOCK DRIVER logic IC, it works. It is possible to obtain 4 true outputs. There is a maximum supply voltage of 3.465VV that can be handled by this clock divider. With a source voltage of 3.135V, it is possible to achieve optimal results. For maximum efficiency, the supply voltage should be kept at 3.3V.

9DBL411AGLFT Features


20 terminations
Clock Drivers subcategory
logic IC type of LOW SKEW CLOCK DRIVER

9DBL411AGLFT Applications


There are a lot of Integrated Device Technology (IDT) 9DBL411AGLFT Clock Buffers & Drivers applications.

  • Patient diagnosis
  • DDR4 JEDEC standard LRDIMM design
  • Gigabit Ethernet (GbE)
  • Oscilloscope and logic analyzer front ends
  • Other clock/data distribution
  • Wireless infrastructure equipment
  • Handheld test instruments
  • High-performance workstation
  • Clock signal duplication
  • Information equipment

In Stock

Please send RFQ , we will respond immediately.