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9DB801CFLF datasheet pdf and Clock/Timing - Application Specific product details from Integrated Device Technology (IDT) stock available at Feilidi
- Manufacturer: Integrated Device Technology (IDT)
- NO: 378-9DB801CFLF
- Package: SSOP
- Datasheet:
- Stock: 3562
- Description: 9DB801CFLF datasheet pdf and Clock/Timing - Application Specific product details from Integrated Device Technology (IDT) stock available at Feilidi(Kg)
- Delivery:
- Payment:
In Stock
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| Parameters | |
|---|---|
| Factory Lead Time | 7 Weeks |
| Contact Plating | Tin |
| Mount | Surface Mount |
| Package / Case | SSOP |
| Number of Pins | 48 |
| Published | 2011 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 |
| Number of Terminations | 48 |
| ECCN Code | EAR99 |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Subcategory | Clock Drivers |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 1 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.635mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Pin Count | 48 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 3.3V |
| Temperature Grade | COMMERCIAL |
| Number of Circuits | 1 |
| Max Supply Voltage | 3.465V |
| Min Supply Voltage | 3.135V |
| Nominal Supply Current | 200mA |
| Frequency (Max) | 400MHz |
| Family | 9DB |
| Output Characteristics | 3-STATE |
| Input | HCSL |
| Logic IC Type | PLL BASED CLOCK DRIVER |
| PLL | Yes |
| Same Edge Skew-Max (tskwd) | 0.05 ns |
| Number of True Outputs | 8 |
| Height Seated (Max) | 2.8mm |
| Length | 15.9mm |
| Width | 7.5mm |
| Thickness | 2.3mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
9DB801CFLF Description
The 9DB801CFLF is a DB800 Version 2.0 Yellow Cover part with PCI Express support. It can be used in PC or embedded systems to provide outputs with low cycle-to-cycle jitter (50ps), low output-to-output skew (100ps), and PCI Express gen 1 compliant. The 9DB801CFLF supports a 1 to 8 output configuration, taking a spread or non-spread differential HCSL input from a CK410(B) central clock such as 954101 and 932S401, or any other differential HCSL pair. 9DB801CFLF can generate HCSL or LVDS outputs from 50 to 200MHz in PLL mode or 0 to 400Mhz in bypass mode.
9DB801CFLF Features
8 - 0.7V current-mode differential output pairs
Supports zero delay buffer mode and fanout mode
Bandwidth programming available
Outputs cycle-cycle jitter < 50ps
Outputs skew: 50ps
50 - 200MHz operation
The extended frequency range in bypass mode to 400 MHz
PCI Express Gen I compliant
Real-time PLL lock detects output pin
48-pin SSOP/TSSOP package
Available in RoHS-compliant packaging
9DB801CFLF Applications
Automotive
Body electronics & lighting
Communications equipment
Wired networking
Industrial
Electronic point of sale (EPOS)
