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Contact83115BRLF
1 Circuit 200MHz 3.3V Clock Buffer DUAL 28 Pins QSOP
- Manufacturer: Integrated Device Technology (IDT)
- NO: 378-83115BRLF
- Package: QSOP
- Datasheet:
- Stock: 6629
- Description: 1 Circuit 200MHz 3.3V Clock Buffer DUAL 28 Pins QSOP(Kg)
- Delivery:
- Payment:
In Stock
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| Parameters | |
|---|---|
| Factory Lead Time | 10 Weeks |
| Contact Plating | Tin |
| Mount | Surface Mount |
| Package / Case | QSOP |
| Number of Pins | 28 |
| Published | 2003 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 |
| Number of Terminations | 28 |
| ECCN Code | EAR99 |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Subcategory | Clock Drivers |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 1 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.635mm |
| Pin Count | 28 |
| Number of Outputs | 16 |
| Operating Supply Voltage | 3.3V |
| Temperature Grade | COMMERCIAL |
| Number of Circuits | 1 |
| Max Supply Voltage | 3.465V |
| Min Supply Voltage | 3.135V |
| Nominal Supply Current | 50mA |
| Propagation Delay | 2.4 ns |
| Turn On Delay Time | 3.1 ns |
| Frequency (Max) | 200MHz |
| Output Characteristics | 3-STATE |
| Input | LVTTL |
| Logic IC Type | LOW SKEW CLOCK DRIVER |
| Duty Cycle (Max) | 55 % |
| Same Edge Skew-Max (tskwd) | 0.25 ns |
| Length | 9.9mm |
| Width | 3.8mm |
| Thickness | 1.47mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
83115BRLF Overview
A QSOP case is used for packaging. It is normal to operate with a value of 200MHz. A total of 28 terminations have been found in it. Supply voltages of 3.3V allow for high efficiency. There is a place for it in the way of Surface Mount. The clock buffer contains 28 pins. This IC divider operates on 28 pins. I have enclosed this circuit clock in Clock Drivers for your convenience. A minimum temperature of 0°C is required for reliability. It is possible to achieve stable operation by setting the maximum operating temperature to 70°C. LOW SKEW CLOCK DRIVER is the value of the logic IC used. Default settings are set to output 16. A maximum supply voltage of 3.465VV can be handled by it. This IC dividers can operate with a voltage source of 3.135V as low as possible. When the supply voltage is at 3.3V, the efficiency will be highest.
83115BRLF Features
28 terminations
Clock Drivers subcategory
logic IC type of LOW SKEW CLOCK DRIVER
83115BRLF Applications
There are a lot of Integrated Device Technology (IDT) 83115BRLF Clock Buffers & Drivers applications.
- Patient diagnosis
- High-performance server
- Global positioning system (GPS)
- Smartphone
- Data communication
- Other PCIe Gen2 networking applications
- Edge computing
- High-performance workstation
- Clock signal format conversion
- Tower server
