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FedEx International, 5-7 business days.
The following are some common countries' logistic time.
| Parameters | |
|---|---|
| Propagation Delay | 14 ns |
| Programmable Logic Type | FLASH PLD |
| Number of Logic Blocks (LABs) | 40 |
| Output Function | MACROCELL |
| Number of Macro Cells | 32 |
| Height Seated (Max) | 1.2mm |
| Length | 4.5mm |
| Width | 4.5mm |
| RoHS Status | RoHS Compliant |
| Mount | Surface Mount |
| Package / Case | TFBGA |
| Number of Pins | 64 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Number of Terminations | 64 |
| Terminal Finish | TIN LEAD |
| Max Operating Temperature | 100°C |
| Min Operating Temperature | -40°C |
| HTS Code | 8542.39.00.01 |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Pin Count | 64 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 1.89V |
| Temperature Grade | INDUSTRIAL |
| Supply Voltage-Min (Vsup) | 1.71V |
| Number of I/O | 30 |
| Clock Frequency | 118.3MHz |
5M40ZM64I5 Overview
In the mobile phone network, there are 32macro cells, which are cells with high-power antennas and towers.TFBGAis the package in which it resides.As a result, it has 30 I/O ports programmed.64terminations are programmed into the device.This electrical part has a terminal position of BOTTOMand is connected to the ground.A voltage of 1.8V is used as the power supply for this device.In this chip, the 64pins are programmed.Surface Mountis used to mount this electronic component.64pins are included in its design.In order to ensure proper operation, a maximum supply voltage (Vsup) of 1.89V is required.It is recommended that the operating temperature exceed -40°C.It is recommended to keep the operating temperature below 100°C.The program consists of 40 logic blocks (LABs).The supply voltage (Vsup) should be greater than 1.71V.A frequency of 118.3MHzshould not be exceeded by its clock.It is possible to classify programmable logic as FLASH PLD.
5M40ZM64I5 Features
TFBGA package
30 I/Os
64 pin count
64 pins
40 logic blocks (LABs)
5M40ZM64I5 Applications
There are a lot of Altera 5M40ZM64I5 CPLDs applications.
- I2C BUS INTERFACE
- Field programmable gate
- Timing control
- POWER-SAVING MODES
- Preset swapping
- White goods (Washing, Cold, Aircon ,...)
- Power up sequencing
- D/T registers and latches
- Page register
- Portable digital devices
