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| Parameters | |
|---|---|
| Number of Pins | 20 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Moisture Sensitivity Level (MSL) | 1 |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 125°C |
| Min Operating Temperature | -55°C |
| Subcategory | Bus Driver/Transceiver |
| Technology | CMOS |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | 240 |
| Number of Functions | 2 |
| Supply Voltage | 5V |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Pin Count | 20 |
| Number of Outputs | 8 |
| Qualification Status | Qualified |
| Operating Supply Voltage | 5V |
| Number of Elements | 2 |
| Polarity | Non-Inverting |
| Power Supplies | 5V |
| Temperature Grade | MILITARY |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Load Capacitance | 50pF |
| Number of Ports | 2 |
| Number of Bits | 4 |
| Propagation Delay | 8.5 ns |
| Quiescent Current | 10μA |
| Family | FCT |
| Logic Function | Buffer |
| Output Characteristics | 3-STATE |
| Logic IC Type | BUS DRIVER |
| Prop. Delay@Nom-Sup | 7 ns |
| High Level Output Current | -12mA |
| Low Level Output Current | 48mA |
| Control Type | ENABLE LOW |
| Height | 2.9mm |
| Length | 25.4mm |
| Width | 7.62mm |
| Thickness | 2.9mm |
| RoHS Status | Non-RoHS Compliant |
| Lead Free | Contains Lead |
| Contact Plating | Lead, Tin |
| Mount | Through Hole |
| Package / Case | CDIP |
5962-9220301MRA Overview
A CDIP case is used for packaging. A total of 20 terminations are present. Supply voltages of 5V allow for high efficiency. It has been positioned in the way of Through Hole. It has a pin count of 20 on it. In order for the timeing clock to operate, it is connected to the 20 pins. There is a cut smart buffer contained in Bus Driver/Transceiver that is used for this purpose. The clock switch operates at a minimum working temperature of -55°C in order to maintain reliability. The maximum operating temperature of 125°C enables stable operation. This electronic gadget is a member of the FCT family. An IC with a value of BUS DRIVER is used in order to achieve this. By default, the output is set to 8. As a result, it requires a supply voltage of 5V volts to run. There is a maximum supply voltage of 5.5VV that can be handled by this clock divider. Depending on the type of source voltage, it can run with a voltage as low as 4.5V. Keeping the supply voltage at 5V is the key to maximizing the efficiency of the system. The clock divider consumes 10μA quiescent current, and it is unaffected by external factors. There is a configuration of 4 bits for this clock divider. It has 2 ports configured. A total of 2 elements make up this object.
5962-9220301MRA Features
20 terminations
Bus Driver/Transceiver subcategory
logic IC type of BUS DRIVER
5962-9220301MRA Applications
There are a lot of Integrated Device Technology (IDT) 5962-9220301MRA Clock Buffers & Drivers applications.
- Network attached storage
- Artificial intelligence
- High speed line receiver
- Dual core processor workstations and servers
- Tlecom applications
- Big data
- High-performance workstation
- Base station
- Consumer Electronics
- Other PCIe Gen2 networking applications
