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2 Circuit 5V Clock Buffer DUAL 20 Pins CDIP
- Manufacturer: Integrated Device Technology (IDT)
- NO: 378-49FCT805CTDB
- Package: CDIP
- Datasheet:
- Stock: 6930
- Description: 2 Circuit 5V Clock Buffer DUAL 20 Pins CDIP(Kg)
- Delivery:
- Payment:
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| Parameters | |
|---|---|
| Mount | Through Hole |
| Package / Case | CDIP |
| Number of Pins | 20 |
| Packaging | Rail/Tube |
| Published | 2009 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 1 |
| Number of Terminations | 20 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 125°C |
| Min Operating Temperature | -55°C |
| Subcategory | Clock Drivers |
| Technology | CMOS |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | 240 |
| Number of Functions | 2 |
| Supply Voltage | 5V |
| Pin Count | 20 |
| Number of Outputs | 10 |
| Operating Supply Voltage | 5V |
| Power Supplies | 5V |
| Temperature Grade | MILITARY |
| Number of Circuits | 2 |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Propagation Delay | 6 ns |
| Quiescent Current | 5μA |
| Turn On Delay Time | 6 ns |
| Family | FCT |
| Output Characteristics | 3-STATE |
| Input | LVTTL |
| Logic IC Type | LOW SKEW CLOCK DRIVER |
| Screening Level | MIL-STD-883 Class B |
| Same Edge Skew-Max (tskwd) | 0.7 ns |
| Length | 25.4mm |
| Width | 7.62mm |
| Thickness | 2.9mm |
| Radiation Hardening | No |
| RoHS Status | RoHS Compliant |
| Lead Free | Contains Lead |
49FCT805CTDB Overview
There is a case available for the cut smart buffer in CDIP. There is a Rail/Tube packaged with it. There are 20 terminations in it. Supply voltages of 5V enable high efficiency. In this case, it is placed in the way of Through Hole. It has a pin count of 20 on it. Operation is performed using the 20 pins. There is an embedded device in Clock Drivers containing this circuit clock. Temperatures below -55°C are required to keep it reliable. 125°C is the maximum operating temperature required for stable operation. A member of the FCT family, this gadget is a timeing clock. LOW SKEW CLOCK DRIVER is the value of the logic IC used. The default setting of this field is to output 10. There is a voltage supply of 5V volts for powering it. There is a maximum supply voltage of 5.5VV that can be handled by this clock divider. With a voltage supply of 4.5V, this cut smart buffer can operate as low as possible. It is recommended that the supply voltage be kept at 5V for maximum efficiency. It consumes 5μA quiescent current and is unaffected by external influences.
49FCT805CTDB Features
20 terminations
Clock Drivers subcategory
logic IC type of LOW SKEW CLOCK DRIVER
49FCT805CTDB Applications
There are a lot of Integrated Device Technology (IDT) 49FCT805CTDB Clock Buffers & Drivers applications.
- DDR4 JEDEC standard LRDIMM design
- Car
- High reliability telecommunication system
- Mass storage system
- Host bus adapter card
- Smartphone
- Edge computing
- Oscilloscope and logic analyzer front ends
- 5G
- High performance communication system
