49FCT805ASOG

2 Circuit 5V Clock Buffer DUAL 20 Pins SOIC


  • Manufacturer: Integrated Device Technology (IDT)
  • NO: 378-49FCT805ASOG
  • Package: SOIC
  • Datasheet: pdf
  • Stock: 9779
  • Description: 2 Circuit 5V Clock Buffer DUAL 20 Pins SOIC(Kg)

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SPECIFICATIONS

Parameters
Factory Lead Time 7 Weeks
Contact Plating Tin
Mount Surface Mount
Package / Case SOIC
Number of Pins 20
Published 2009
JESD-609 Code e3
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1
Number of Terminations 20
ECCN Code EAR99
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Subcategory Clock Drivers
Technology CMOS
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 2
Supply Voltage 5V
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 20
Number of Outputs 10
Qualification Status Not Qualified
Operating Supply Voltage 5V
Power Supplies 5V
Temperature Grade COMMERCIAL
Number of Circuits 2
Max Supply Voltage 5.25V
Min Supply Voltage 4.75V
Nominal Supply Current 5.1mA
Propagation Delay 8 ns
Quiescent Current 5μA
Family FCT
Output Characteristics 3-STATE
Input LVTTL
Logic IC Type LOW SKEW CLOCK DRIVER
Max I(ol) 0.064 A
Same Edge Skew-Max (tskwd) 0.7 ns
Length 12.8mm
Width 7.6mm
Thickness 2.34mm
RoHS Status RoHS Compliant
Lead Free Lead Free

49FCT805ASOG Overview


As far as the case type is concerned, the cut smart buffer is available in SOIC. It has 20 terminations. Supply voltages of 5V enable high efficiency. As a result, it is placed in the way of Surface Mount. There are 20 pins on the clock buffer. The 20 pins are used for operation. There is a circuit clock contained within Clock Drivers that is responsible for this function. Temperatures below 0°C are required to keep it reliable. It is possible to achieve stable operation by setting the maximum operating temperature to 70°C. The buffer IC belongs to the FCT family. The circuit uses a logic IC with a value of LOW SKEW CLOCK DRIVER as the input. As a default, it is set to output 10 by default. Power is provided by a 5V volt source. The maximum supply voltage is 5.25VV. As low as possible, the voltage source of the clock divider can be 4.75V. For maximum efficiency, the supply voltage should be kept at 5V. There is no external influence on it, as it consumes 5μA quiescent current.

49FCT805ASOG Features


20 terminations
Clock Drivers subcategory
logic IC type of LOW SKEW CLOCK DRIVER

49FCT805ASOG Applications


There are a lot of Integrated Device Technology (IDT) 49FCT805ASOG Clock Buffers & Drivers applications.

  • High speed line receiver
  • DDR4 JEDEC standard LRDIMM design
  • Oscilloscope and logic analyzer front ends
  • Medical imaging
  • Radar
  • Clock signal duplication
  • Telecommunications
  • Industrial automation control system
  • Furniture
  • High speed industry

In Stock

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