49FCT3805EPYGI

2 Circuit 166MHz 3.3V Clock Buffer DUAL 20 Pins SSOP


  • Manufacturer: Integrated Device Technology (IDT)
  • NO: 378-49FCT3805EPYGI
  • Package: SSOP
  • Datasheet: pdf
  • Stock: 9299
  • Description: 2 Circuit 166MHz 3.3V Clock Buffer DUAL 20 Pins SSOP(Kg)

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  • Payment: payment

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SPECIFICATIONS

Parameters
Factory Lead Time 8 Weeks
Contact Plating Tin
Mount Surface Mount
Package / Case SSOP
Number of Pins 20
Published 2009
JESD-609 Code e3
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1
Number of Terminations 20
ECCN Code EAR99
Max Operating Temperature 85°C
Min Operating Temperature -40°C
Subcategory Clock Drivers
Technology CMOS
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 2
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 20
Number of Outputs 10
Operating Supply Voltage 3.3V
Temperature Grade INDUSTRIAL
Number of Circuits 2
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Propagation Delay 2.5 ns
Quiescent Current 100nA
Turn On Delay Time 2.5 ns
Frequency (Max) 166MHz
Family FCT
Output Characteristics 3-STATE
Input LVTTL
Logic IC Type LOW SKEW CLOCK DRIVER
Height Seated (Max) 1.99mm
Length 7.2mm
Width 5.3mm
Thickness 1.73mm
Radiation Hardening No
RoHS Status RoHS Compliant
Lead Free Lead Free

49FCT3805EPYGI Overview


There is a case available for the cut smart buffer in SSOP. The maximum value for normal operation is 166MHz. A total of 20 terminations are present in it. High efficiency is feasible with a supply voltage of 3.3V. As a result, it is placed in the way of Surface Mount. 20 pins are present on timeing clock. This IC divider operates on 20 pins. There is a cut smart buffer contained in Clock Drivers that is used for this purpose. At a minimum working temperature of -40°C, it maintains reliability. 85°C is the maximum operating temperature that ensures stable operation. There is an electronic gadget called FCT in this family. An IC with a value of LOW SKEW CLOCK DRIVER is used in order to achieve this. By default, the output is set to 10. It can handle a maximum supply voltage of 3.6VV. Depending on the type of source voltage, it can run with a voltage as low as 3V. The supply voltage should be kept at 3.3V for maximum efficiency. The clock divider consumes 100nA quiescent current, and it is unaffected by external factors.

49FCT3805EPYGI Features


20 terminations
Clock Drivers subcategory
logic IC type of LOW SKEW CLOCK DRIVER

49FCT3805EPYGI Applications


There are a lot of Integrated Device Technology (IDT) 49FCT3805EPYGI Clock Buffers & Drivers applications.

  • High-speed flip-flop
  • FPGA
  • Switch
  • Patient diagnosis
  • Internet of Things
  • Mass storage system
  • Window comparator
  • Zero crossing detector
  • Hardware accelerator
  • DDR4 JEDEC standard LRDIMM design

In Stock

Please send RFQ , we will respond immediately.