49FCT20805PYGI

2 Circuit 166MHz 2.5V Clock Buffer DUAL 20 Pins SSOP


  • Manufacturer: Integrated Device Technology (IDT)
  • NO: 378-49FCT20805PYGI
  • Package: SSOP
  • Datasheet: pdf
  • Stock: 7279
  • Description: 2 Circuit 166MHz 2.5V Clock Buffer DUAL 20 Pins SSOP(Kg)

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SPECIFICATIONS

Parameters
Factory Lead Time 8 Weeks
Contact Plating Tin
Mount Surface Mount
Package / Case SSOP
Number of Pins 20
Published 2013
JESD-609 Code e3
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1
Number of Terminations 20
ECCN Code EAR99
Max Operating Temperature 85°C
Min Operating Temperature -40°C
Subcategory Clock Drivers
Technology CMOS
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 2
Supply Voltage 2.5V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 20
Number of Outputs 10
Qualification Status Not Qualified
Output Type TTL
Operating Supply Voltage 2.5V
Temperature Grade INDUSTRIAL
Number of Circuits 2
Max Supply Voltage 2.7V
Min Supply Voltage 2.3V
Nominal Supply Current 115mA
Propagation Delay 3 ns
Quiescent Current 100nA
Frequency (Max) 166MHz
Family FCT
Output Characteristics 3-STATE
Input LVTTL
Logic IC Type LOW SKEW CLOCK DRIVER
Max I(ol) 0.008 A
Height Seated (Max) 1.99mm
Length 7.2mm
Width 5.3mm
Thickness 1.73mm
RoHS Status RoHS Compliant
Lead Free Lead Free

49FCT20805PYGI Overview


As far as the case type is concerned, the cut smart buffer is available in SSOP. In normal operation, the maximum value is set to 166MHz. There are 20 terminations in it. Supply voltages of 2.5V are capable of achieving high efficiency. It is placed in the way of Surface Mount. It has a number of pins of 20. The 20 pins are used for operation. This clock divider?is econtained in Clock Drivers. It is designed to operate at a minimum temperature of -40°C in order to maintain reliability. Temperatures below 85°C allow stable operation. The gadget belongs to the FCT family of clock buffers. LOW SKEW CLOCK DRIVER is the value of the logic IC used in this circuit. It is set to output 10 by default. There is a maximum supply voltage of 2.7VV that can be handled by this clock divider. If the source voltage is as low as possible, 2.3V will work. Keeping the supply voltage at 2.5V is the key to maximizing the efficiency of the system. In addition, it consumes 100nA quiescent current and is unaffected by external factors. When configuring the output, TTL is used.

49FCT20805PYGI Features


20 terminations
Clock Drivers subcategory
logic IC type of LOW SKEW CLOCK DRIVER

49FCT20805PYGI Applications


There are a lot of Integrated Device Technology (IDT) 49FCT20805PYGI Clock Buffers & Drivers applications.

  • Edge computing
  • Radar
  • Car
  • Threshold detection
  • Line receiver and signal recovery
  • Cell Phone (UMTS/WCDMA/GSM)
  • Other clock/data distribution
  • High speed line receiver
  • Clock signal level shifting
  • Machine made

In Stock

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