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1 Circuit 133.33MHz 3.3V Clock Buffer DUAL 16 Pins TSSOP
- Manufacturer: Integrated Device Technology (IDT)
- NO: 378-2309NZ-1HPGG8
- Package: TSSOP
- Datasheet:
- Stock: 5585
- Description: 1 Circuit 133.33MHz 3.3V Clock Buffer DUAL 16 Pins TSSOP(Kg)
- Delivery:
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| Parameters | |
|---|---|
| Factory Lead Time | 7 Weeks |
| Contact Plating | Tin |
| Mount | Surface Mount |
| Package / Case | TSSOP |
| Number of Pins | 16 |
| Packaging | Tape & Reel (TR) |
| Published | 2009 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 1 |
| Number of Terminations | 16 |
| ECCN Code | EAR99 |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Subcategory | Clock Drivers |
| Terminal Position | DUAL |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 1 |
| Supply Voltage | 3.3V |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 16 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 3.3V |
| Temperature Grade | COMMERCIAL |
| Number of Circuits | 1 |
| Max Supply Voltage | 3.6V |
| Min Supply Voltage | 3V |
| Power Dissipation-Max | 700mW |
| Frequency (Max) | 133.33MHz |
| Family | 2309 |
| Input | LVTTL |
| Logic IC Type | PLL BASED CLOCK DRIVER |
| Max I(ol) | 0.008 A |
| Prop. Delay@Nom-Sup | 8.7 ns |
| Propagation Delay (tpd) | 8.7 ns |
| Same Edge Skew-Max (tskwd) | 0.25 ns |
| Number of True Outputs | 9 |
| Length | 5mm |
| Width | 4.4mm |
| Thickness | 1mm |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
2309NZ-1HPGG8 Overview
The clock divider is available in TSSOP case. It is available in the case Tape & Reel (TR). The maximum value for normal operation is 133.33MHz. There are 16 terminations in it. The supply voltage of 3.3V can be used to achieve high efficiency. In the direction of Surface Mount, it is placed. 16 pins are present on timeing clock. It is operated by using 16 pins. The clock divider is located in Clock Drivers. In order to maintain reliability, the maximum operating temperature is 0°C. Stable operation is enabled by the maximum operating temperature of 70°C. The buffer IC belongs to the 2309 family. A logic IC with a value of PLL BASED CLOCK DRIVER is used. There are currently 9 true outputs available in the system. A maximum of 3.6V V can be supplied to it. As low as possible, it can be worked with a source voltage of 3V, or as close to that as possible. It is recommended to keep the supply voltage at 3.3V to maximize efficiency.
2309NZ-1HPGG8 Features
16 terminations
Clock Drivers subcategory
logic IC type of PLL BASED CLOCK DRIVER
2309NZ-1HPGG8 Applications
There are a lot of Integrated Device Technology (IDT) 2309NZ-1HPGG8 Clock Buffers & Drivers applications.
- Computing
- Zero crossing detector
- DDR4 JEDEC standard LRDIMM design
- High speed line receiver
- Clock signal format conversion
- Car
- 5G
- High-performance workstation
- Wireless infrastructure equipment
- Telecommunications
